The present disclosure relates to semiconductor structures, and more particularly to planar and fin field effect transistor (FET) structures having a thin silicon carbon alloy layer in a channel, and methods of manufacturing the same.
In some processing schemes for manufacturing complementary metal oxide semiconductor (CMOS) devices employing a high dielectric constant (high-k) gate dielectric material and a metallic gate electrode material, the gate workfunction of n-type field effect transistors (NFETs) is tuned by addition of lanthanum at a bottommost layer of a gate electrode, while the gate workfunction of p-type field effect transistors (PFETs) is determined by the material composition of the gate electrode that does not include added lanthanum. The greater the amount of lanthanum that is added to a gate electrode of an NFET, the greater the shift of the gate workfunction to the valence band edge of silicon. However, addition of lanthanum degrades the mobility of charge carriers (electrons) in the channel of the NFET. The degradation of the minority carrier mobility in the channel of the NFET is proportional to the amount of lanthanum added to the gate electrode of the NFET. Thus, a significant undesirable side effect of degradation of charge carrier mobility accompanies the addition of lanthanum to alter the gate workfunction in an NFET.
Another approach to match the gate workfunction of NFETs to the valence band edge of an underlying silicon-based material is to implant carbon at a concentration that preserves the crystallinity of the underlying silicon-based material. The atomic concentration of carbon is less than 1.0% in a silicon carbon alloy formed by implantation of carbon into single crystalline silicon. While such implantation of carbon demonstrated a significant benefit for shifting the workfunction of a carbon-implanted channel, the carbon implantation introduces carbon atoms into shallow trench isolation structures. The shallow trench isolation structures include silicon oxide, and when implanted with carbon, the silicon oxide of the shallow trench isolation structures becomes a carbon-doped silicon oxide. Carbon-doped silicon oxide is more susceptible to wet etches or clean chemistries employed throughout semiconductor manufacturing sequences. Particularly, the loss of the carbon-doped silicon oxide material in the shallow trench isolation structures during a reactive ion etch employed for gate patterning is significant, and results in a height variation of shallow trench isolation structures, pull-down of gate conductor materials, and electrical shorts of various semiconductor components through strips of residual gate conductor materials deposited in divots. In addition, because the energy of ion implantation cannot be precisely controlled for shallow implantation, any carbon implanted structure has a thickness greater than 5 nm, making the carbon implantation method unusable for extremely thin semiconductor-on-insulator (ETSOI) structures in which the entire thickness of a top semiconductor layer is on the order of 5 nm. Thus, use of carbon implantation to form carbon-doped silicon material is impractical for many applications.